# This is a hlist.txt file for ChipVault (cv.pl) # If your Verilog and/or VHDL is readable by ChipVault, # ChipVault will automatically generate this file for you # the 1st time you run ChipVault by reading in all of your # *.v* files and figuring out your design hierarchy. If it # should fail for some reason, creating an hlist.txt by hand # is really easy. Left column is Module Name, Right Column is # the file associated with it. The number of spaces left of the # Module Name encodes the hierarchy position. # # Note: Its perfectly legal to put in non-RTL files in here as # well, just follow the hierarchy rules ie # test_vectors # vec1 vector1.tv # vec2 vector2.tv # test_documentation # doc1 doc1.txt # doc2 doc2.txt # # # Example of CV_World Encrypted and Clear Files. Note: foo.v is encrypted # using the cheezy method. bar.vhd uses blowfish foo foo.v http://chipvault.sourceforge.net/foo.v.cv_world=128bitOpenAccess # bar bar.vhd http://chipvault.sourceforge.net/bar.vhd.cv_world=128bitOpenAccess foo2 foo2.v http://chipvault.sourceforge.net/foo2.v # log.txt hlist.txt tb_top tb_top.vhd tb_vector_in tb_vector_in.vhd tb_vector_out tb_vector_out.vhd top top.vhd video_in video_in.vhd in_fsm in_fsm.vhd in_ram in_ram_struct.vhd in_ram_bist in_ram_bist.vhd lfsr lfsr.vhd in_ram_ram in_ram_ram.vhd in_ram' in_ram_behav.vhd dsp dsp.vhd dsp_fsm dsp_fsm.vhd dsp_ram dsp_ram.vhd dsp_ram_bist dsp_ram_bist.vhd lfsr lfsr.vhd dsp_ram_ram dsp_ram_ram.vhd dsp_ram' dsp_ram_behav.vhd jpeg jpeg.v dct dct.v video_out video_out.vhd out_fsm out_fsm.vhd out_ram out_ram_struct.vhd out_ram_bist out_ram_bist.vhd out_ram_ram out_ram_ram.vhd out_ram' out_ram_behav.vhd top' top_netlist.vhd video_in top_netlist.vhd in_fsm top_netlist.vhd in_ram top_netlist.vhd in_ram_bist top_netlist.vhd lfsr lfsr.vhd in_ram_ram top_netlist.vhd in_ram' dsp dsp_fsm dsp_ram dsp_ram_bist lfsr lfsr.vhd dsp_ram_ram dsp_ram' jpeg dct video_out out_fsm out_ram out_ram_bist lfsr lfsr.vhd out_ram_ram out_ram' top'' top_netlist.vhd video_in top_netlist.vhd in_fsm top_netlist.vhd in_ram top_netlist.vhd in_ram_bist top_netlist.vhd lfsr lfsr.vhd in_ram_ram top_netlist.vhd in_ram' dsp dsp_fsm dsp_ram dsp_ram_bist lfsr lfsr.vhd dsp_ram_ram dsp_ram' jpeg dct video_out out_fsm out_ram out_ram_bist lfsr lfsr.vhd out_ram_ram out_ram'